Device degradation behavior and polysilicon film morphology of thin film transistors fabricated using advanced excimer laser lateral solidification techniques

Abstract

The degradation of polysilicon thin film transistors fabricated in films obtained using variations of advanced through-mask excimer laser anneal sequential lateral solidification (SLS) schemes was investigated. The morphology and grain structure of these 50 nm thick polysilicon films was studied using SEM and AFM. Very elongated or square-like polycrystalline silicon grains were observed, as shaped by each crystallization technique. Hot carrier stressing measurements, under gate and drain DC biases, were performed and the TFT device parameters and characteristics were extracted for various stressing times. The threshold voltage V th, subthreshold slope S and transconductance G m were observed to exhibit shifts with stressing time, indicating some active layer and interface degradation ascribed to hot carrier injection and trap generation. These shifts depended both on stress conditions and on the fabrication technique used. The hot carrier stressing results thus indicate that the material structure affects the degradation rates of the TFT parameters and trap densities. Furthermore, the device structure and the crystallization conditions, with the resulting film morphology, affect not only the TFT degradation behavior but also other aspects of device performance; the susceptibility to drain current avalanche effects was found to be lower for TFTs in 2 N-shot polysilicon compared to ones in very elongated grain (directional) material.