Abstract
Waveform unfolding, in which photomultiplier tube signals are expressed as a linear combination of single-photoelectron waveforms, is a useful processing method both for analysis and for data compression in the IceCube Neutrino Observatory. This processing is currently only possible with a cluster of computers on the surface, but improvements in embedded technology will make it possible to move this unfolding inside the digital optical modules for planned extensions of IceCube such as IceCube-Gen2. In order to meet power constraints, waveform unfolding is most efficiently implemented with field programmable gate arrays (FPGA). A non-negative least squares (NNLS) algorithm developed for use with FPGAs was modified to reproduce the results of the Lawson-Hanson NNLS algorithm that is currently used for waveform unfolding in IceCube. High Level Synthesis (HLS) tools were used to synthesize firmware directly from C code. This proceeding discusses the structure and performance of the modified NNLS algorithm that was developed, and demonstrates what can be accomplished with new FPGA synthesis tools.
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