Development of Top-Gate Nanocrystalline Si:H Thin Film Transistors

Abstract

ABSTRACTWe report on the growth and fabrication of top gate thin film transistors at low temperatures in nanocrystalline Si:H. The nanocrystalline Si:H was deposited using a VHF-PECVD plasma process at 45 MHz in a diode reactor. The material was deposited from a mixture of silane and hydrogen at a temperature of 250-300°C. Higher temperatures resulted in a loss of hydrogen from the material. The properties of the nanocrystalline Si:H were studied using x-ray diffraction and Raman spectroscopy. The material showed a high ratio (3.8) between the crystalline and amorphous peaks in the Raman spectrum. X-ray diffraction data showed the films to be predominantly oriented in <111> direction, and the grain size estimated from Scherer's formula was in the range of 12-15 nm. The doping of the material could be changed by introducing ppm levels of Boron or Phosphorus. The as-grown material was generally n type. By adding controlled amounts of B, the material could be made p type. The devices made were n-channel MISFET's with p body. The n+ source and drain layers were made from amorphous Si:H. A systematic investigation of the appropriate oxide/nitride layer to be used was undertaken. The nitride layers were grown at 250-300°C using mixtures of silane and ammonia, with a high degree of dilution by helium. The presence of helium dilution, along with post-deposition passivation by a hydrogen plasma, was found to produce reproducible, low interface defect density nitride materials. Interface state densities were measured using capacitance spectroscopy at different frequencies and temperatures and found to be in the range of 4.5x1011/cm2-eV. The breakdown strength of the nitride was measured and found to be 4 MV/cm. Proof-of-concept TFT devices were fabricated using reactive ion etching. The threshold voltage was in the range of 13-15 V, and the on/off ratio was in the range of 103.