Abstract
The introduction of a new generation of microprocessors that belong to the Elbrus family and involve the introduction of a network-on-chip, requires the development of efficient means of access to DDR random access memory channels for network nodes. The paper includes a solution to this issue related to the interaction between DDR4 RAM and Elbrus-16СВ, 16-core microprocessor, which demands higher standards of an available capacity and peak bandwidth of memory channels. When designing Elbrus-16CB microprocessor, higher energy efficiency and reliability are also between main objectives. When performing the tasks set, an important component was adaptation of the memory controller, successfully applied in the microprocessors produced by MCST JSC, to DDR4 3DS standard compliance, taken as a basis for the use in a number of recent developments. It provides a four-time higher available RAM capacity without a directly proportional growth of energy consumption. The paper includes a structure of the memory controller and made decisions. These make it possible to increase the target frequency in operations of the device by 30% up to 800 MHz and increase operation reliability of the memory channel.
Highlights
The introduction of a new generation of microprocessors that belong to the Elbrus family and involve the introduction of a network-on-chip, requires the development of efficient means of access to DDR random access memory channels for network nodes
The paper includes a solution to this issue related to the interaction between DDR4 RAM and Elbrus-16СВ, 16-core microprocessor, which demands higher standards of an available capacity and peak bandwidth of memory channels
When performing the tasks set, an important component was adaptation of the memory controller, successfully applied in the microprocessors produced by MCST JSC, to DDR4 3DS standard compliance, taken as a basis for the use in a number of recent developments
Summary
Максимальное количество логических ранков в стеке равно восьми, поэтому по сравнению с возможностями предыдущего микропроцессора «Эльбрус8СВ» максимальный объем, поддерживаемый контроллером памяти в одном канале, увеличивается в восемь раз до 1 Тбайт. В данный момент основные производители микросхем памяти выпускают модули DDR4 3DS 4H Stack объемом 128 Гбайт, что позволяет набрать объем памяти 2 Тбайт для одного процессора «Эльбрус-16СВ» при заполнении двух слотов в каждом канале. Наращивание емкости модуля памяти вследствие использования DDR4 3DS не приводит к пропорциональному росту энергопотребления и снижению рабочей частоты, так как нагрузка на шину данных остается сопоставимой с обычными модулями DDR и не зависит от количества логических ранков в стеке [5]. 2. В этой реализации контроллер памяти (memory controller, MC) и физический уровень DDR впервые в серии процессоров «Эльбрус» объединены структурно и пространственно в один блок. Система питания физического уровня DDR4 чувствительна к асинхронным шумам, поэтому для устройства доступа в ОП выделяется независимый домен питания VDD.
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