Development of IP Core to Transfer DTMF base Caller ID from FPGA to DSP Processor

Abstract

Objective: As per the technical requirements, N telephone channels are to be processed along with caller ID information for further voice compression and effective storage. Methods: The received telephone single ended signal generated by using “Telephone’s 2 to 4 wire converter” IC is fed as input to DTMF decoder IC for the caller ID extraction for the telephone call. “Telephone’s 2 to 4 wire converter” IC is used to extract the ring detection and On/Off hook detection by which the telephone signal can be received and processed by using less bandwidth and power. Findings: Based on the survey, it was found that there is no single chip available in the market to extract caller ID using DTMF for number of telephone lines meaning that for each and every telephone interface one “DTMF based Caller ID extraction” IC has to be used. Similarly SLIC, SLAC and many other ICs available in the market were studied. Based on the comparison of those ICs with reference to their power consumption, foot print size, price, obsolescence, external battery for DC operation etc., it is proposed to go for the discrete solution for the extraction of DTMF based caller ID, Ring detection and On/Off Hook detection which achieves power consumption, power dissipation, cost and PCB layout area. Since the DSP process does not have sufficient number of I/O pins to connect telephone lines related control and data directly, FPGA has been chosen for the design to collect the telephone related control and data for N number of channels using the custom logic interface with the identified ICs. Applications/improvements: Test setup is arranged using the eval boards of FPGA, DSP processor, DTMF IC (CMX865A) and Silvertel’s AG2120 Eval board to realise the proto type. Keywords: Caller ID, Dual Tone Multiple Frequency (DTMF) IC, DSP Processor, FPGA, IP Core