Development of III-Sb Technology for p-Channel MOSFETs

Abstract

Alternative channel materials with superior transport properties over conventional silicon based systems are required for supply voltage scaling in CMOS circuits. Group III- Sb 's are a candidate for high mobility p-channel applications due to a low hole effective mass, large injection velocity in scaled devices and the ability to achieve enhanced hole mobility in strained quantum wells (QW). Multiple challenges in antimonide MOSFET development are assessed and developed technologies were implemented into p-channel MOSFET fabrication with a low thermal processing budget of 350°C. These challenges include growth of “bulk” GaSb and bi-axial compressively strained In x Ga 1-x Sb QW channels on lattice mismatched GaAs substrates, reduction of interface trap state density (Dit) at the III- Sb /high-k oxide interface and avoiding ion implanted source and drain contacts with high temperature activation annealing. A “self-aligned” single mask p-channel MOSFET fabrication process was developed on buried In 0.36 Ga 0.64 Sb QW channels using intermetallic source and drain contacts. The first “gate-last” MOSFET process on In 0.36 Ga 0.64 Sb QW channels with pre-grown epitaxial p++- GaSb contacts is demonstrated. InAs has been proven to be an excellent etch stop layer when using an optimized tetramethylammonium hydroxide (TMAH) etch of p++- GaSb to prevent InGaSb QW damage.