Abstract
At PTB, for application in rapid single flux quantum (RSFQ) and voltage standard circuits, the development of highly integrated SDE circuits is focused on devices based on intrinsically shunted Josephson junctions in the SINIS and SNS technologies. In SINIS technology, the fabrication process has been optimized to values of the critical current density of j C=500 A/cm 2 and the characteristic voltage of V C=190 μV. To raise the circuit integration level, successive steps of development are shown by the example of the layout of an elementary RSFQ cell designed for higher values of j C. In SNS technology, a fabrication process has been developed to produce small ramp-type junctions with contact areas smaller than 0.4 μm 2 and with values for j C and V C of about j C=200 kA/cm 2 and V C=20 μV. The design allows the SNS junction size to be further reduced down to the deep sub-micron range.
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