Development of EDA Techniques for Power Module EMI Modeling and Layout Optimization

Abstract

Abstract The design of power electronics modules is undergoing renewed interest as new challenges and technologies emerge in the realm of wide bandgap (WBG) power device packaging. In order to meet the demands of these high-speed transistors, novel techniques are required to produce modules with reduced parasitics and noise generation without exceeding the operating temperature of the devices or their packaging materials. Traditionally, power module design has been a highly iterative process—repeatedly reworking and simulating designs using finite element analysis (FEA) tools that require considerable time in terms of both labor and computation. To overcome these issues, an electronic design automation tool (EDA) known as PowerSynth is ongoing in its development toward power module layout synthesis and optimization based on electrical and thermal criteria. In this paper, work to extend the capabilities of PowerSynth to optimize layouts with reduced electromagnetic interference (EMI) is presented. Optimization strategies based on the transfer functions of noise propagation paths are introduced and results showing layouts with reduced noise generation are compared with FEA simulations.