Abstract

The increased requirements of payload capacity of the satellites have resulted in much higher power requirements of the satellites. In order to minimize the energy loss during power transmission due to cable loss, use of high voltage solar panels becomes necessary. When a satellite encounters space plasma it floats negatively with respect to the surrounding space plasma environment. At high voltage, charging and discharging on solar panels causes the power system breakdown.Once a solar panel surface is charged and potential difference between surface insulator and conductor exceeds certain value, electrostatic discharge (ESD) may occur. This ESD may trigger a secondary arc that can destroy the solar panel circuit. ESD is also called as primary or minor arc and secondary is called major arc. The energy of minor arc is supplied by the charge stored in the coverglass of solar array and is a pulse of typically several 100 ns to several 100 μs duration. The damage caused by minor arc is less compared to major arcs, but it is observed that the minor arc is cause of major arc. Therefore it is important to develop an understanding of minor arc and mitigation techniques. In this paper we present a linear circuit analysis for minor arcs on solar panels.To study arcing event, a ground experimental facility to simulate space plasma environment has been developed at Facilitation Centre for Industrial Plasma Technologies (Institute for Plasma Research) in collaboration with Indian Space Research Organization's ISRO Satellite Technology Centre (ISAC). A linear circuit model has been developed to explain the experimental results by representing the coverglass, solar cell interconnect and wiring by an LCR circuit and the primary arc by an equivalent LR circuit. The aim of the circuit analysis is to predict the arc current which flows through the arc plasma. It is established from the model that the current depends on various parameters like potential difference between insulator and conductor, arc resistance, stored charge in the solar cell coverglass and the external capacitor that simulates wire harness. A close correlation between the experiments and circuit model results has been observed.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call