Development of a Time-Division Switching Network Usable in a Very Large Range of Capacities

Abstract

Well adapted to medium size systems, the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</tex> switching networks fully proved the operational value of the time division principles. For higher capacities, the more usual realizations are now STS and mainly TST networks. These are attractive as the growth of the equipment proportional to the square of the number of subscribers is limited to the intermediate stage (or stages). Drastic improvements in semiconductor technology, particularly in the memory field, allow another step: mixing in the same I.C. can, the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</tex> stages. In this concept, staggering or even functional discrimination of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</tex> appears to be useless and artificial. The resulting matrix circuit has quite symmetrical input-outputs and the multiple incoming bit positions are distributed to the output in whatever time and space arrangement that is needed. This paper describes the networks based on this concept.