Development of a test bed for high-speed power line communications

Abstract

This paper presents the development of a power line test bed which provides a platform to simulate the 230 V power line environment in a controlled and reproducible manner. The target is to communicate data reliably over power lines at speeds of at least 1 Mbits/s with frequency ranging from 1 MHz to 10 MHz. This test bed is integrated with a power line communication channel, power line couplers, loads and impairment devices for worst case environment simulation. A method for coupling the high-frequency signal onto and from the power line is discussed. The design of digital filters for transceivers using advanced digital signal processing techniques is presented. The digital filters are used to amplify, condition and recover the high-frequency signals which have been attenuated and corrupted by noise at the channel.