Abstract
The Micro Vertex Detector (MVD) is the innermost tracking detector of the P̄ANDA (antiProton Annihilation at Darmstadt) experiment at the upcoming FAIR (Facility for Antiproton and Ion Research) facility in Darmstadt. The detector consists of four barrel and six disk layers of silicon pixel and strip sensors to obtain precise tracking of charged particles. For the development of a front-end ASIC a flexible and powerful readout system was designed to test different ASIC prototypes. We will present the upgrade of the FPGA-based Jülich Digital Readout System and measurements of the recent MVD pixel front-end prototype ToPix3. Tests of the implementation of the radiation hard GBT transfer protocol are also shown.
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