Abstract
With future LHC luminosity upgrades, part of the ATLAS muon spectrometer has to be changed, to cope with the increased flux of uncorrelated neutron and gamma particles. Micromegas detectors were chosen as precision tracker for the New Small Wheels, that will replace the current Small Wheel muon detector stations during the LHC shutdown foreseen for 2018. To read out these detectors together with all other ATLAS subsystems, a readout driver was developed to integrate these micromegas detectors into the ATLAS data acquisition infrastructure.The readout driver is based on the Scalable Readout System, and its tasks include trigger handling, slow control, event building and data transmission to the high-level readout systems. This article describes the layout and functionalities of this readout driver and its components, as well as a test of its functionalities in the cosmic ray facility of Ludwig-Maximilians University Munich.
Highlights
With future LHC luminosity upgrades, part of the ATLAS muon spectrometer has to be changed, to cope with the increased flux of uncorrelated neutron and gamma particles
The Scalable Readout Unit (SRU) as a micromegas Read Out Driver (ROD) has to fulfill a variety of tasks, which are all implemented within its hardware and FPGA firmware
The presented ATLAS Read Out Driver based on the SRU unit of the Scalable Readout System shows the expected performance and fulfills all demands on an ATLAS ROD
Summary
Every ATLAS subsystem makes use of individual Read Out Drivers, that serve as interface between the detector-specific infrastructure, and the ATLAS-wide common Read Out System (ROS). The SRU as a micromegas ROD has to fulfill a variety of tasks, which are all implemented within its hardware and FPGA firmware. The LHC bunch-crossing clock, used to synchronize the detectors with the particle collisions, as well as the level 1 trigger signal are distributed to each ATLAS subsystem via light-guiding fibers. The SRU is equipped with a standard TTCrx receiver ASIC [6], developed by the CERN Microelectronics group. It allows the SRU to synchronize with the LHC bunch crossing clock of 40.08 MHz, receive the level 1 trigger signals of the central trigger processor, and the bunch and event counters reset signals, which are necessary to build valid ATLAS event data fragments
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