Development of a novel cost-effective Package-on-Package (PoP) solution

Abstract

Package-on-package (PoP) is one of the major 3D packaging approaches. It vertically combines discrete memory and logic ball grid array (BGA) packages, where one package rests on the top of another. Recently, PoP technologies have attracted more interests, especially for portable electronics related products and applications. For the existing PoP solutions, they have the following disadvantages: (i) As the next-generation PoP module incorporates more features, top package requires more memory inside and finer pitch is needed. Finer pitch of top package will translate into lower stand-off height between top and bottom packages. It means the mold cap of the bottom package should be kept as thin as possible. (ii) The logic function of the bottom package will be expanded with two stacked dies. The mold cap of the bottom package should be thicker than that of the original design which has only one die inside. It causes the conflict between the stand-off height issue and expanded logic functionality. (iii) The bottom package is a plastic ball grid array (PBGA) package format normally. Due to its partial mold-cap design, the package's warpage could be large especially non-uniform on a panel since the structure is not well balanced. (iv) The bottom package with customized mold chase with the top pin gate molding method has the high cost issue. To solve the above disadvantages, ASTRI has developed a new PoP structure, which employs a new bottom package that is over molded fine-pitch ball gird array (FBGA) format with mechanically balanced package structure. For the top package, it's a commercial FBGA format with two die stacking inside. Since the new bottom package structure is based on an existing FBGA format, the mold chase is independent of the mold cap and size of the bottom PoP package. The final mold layer for bottom package has a thickness of 0.5 mm. The top interface of the bottom PoP package has 136 pads with 0.65 mm pitch and a two-row peripheral format, while the bottom interface has 272 pads with 0.65 mm pitch and a four-row peripheral format. The size of both top and bottom packages is 14times14 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The configuration of the package is evaluated by scanning electron microscopy (SEM), which shows a favorable interconnection structure. The warpage of the bottom PoP package after assembly process is characterized by shadow moireacute system. The warpage is well controlled by adopting the fully molded structure. The average value is around 30 mum that is well below the warpage target of 80 mum widely used in the industry.