Development of a new improved high performance flip chip BGA package

Abstract

The recent advancement in high performance semiconductor packages has been driven by the need for higher pin count and superior heat dissipation. A one-piece cavity lid flip chip BGA package with high pin count and targeted reliability has recently been developed by UTAC. The flip chip technology can accommodate I/O count of more than five hundreds, and the die junction temperature can be reduced to a minimum level by a metal heat spreader attachment. Nonetheless, greater expectations on these high performance packages arose such as better substrate land estate utilization for multiple chips, ease in handling for thinner core substrates and improved board level solder joint reliability. A new design of the flip chip BGA package has been looked into for meeting such requirements. By encapsulating the flip chip with molding compound leaving the die top exposed, a planer top surface can be formed. And a flat lid can then be mounted on the planer mold/die top surface. In this manner the direct interaction of the metal lid with the substrate can be removed. The new package is thus less rigid under thermal loading and solder joint reliability enhancement is expected. This paper discusses the process development of the new package and its advantages for improved solder joint fatigue life, and being a multi-chip package and thin core substrate options. Finite element simulations have been employed for the study of its structural integrity, thermal and electrical performances. Detailed package and board level reliability test results will also be reported.