Development of a lead free chip scale package for wireless applications

Abstract

Chip scale packages have seen a growth of over two times in the last two years and are expected to have more demands in the booming telecommunications market. This rapid growth of chip scale packages combined with green packaging solutions has made the implementation of lead free solders for chip scale package applications inevitable. But the effect of various lead free solders on the wetting behavior and their mechanical strength and the under bump metallization (UBM) integrity are also important to achieve a reliable chip scale package. This paper presents a methodology of implementation of lead free solder in the first and second level interconnects as a replacement for eutectic tin lead (SnPb) solder in chip scale packages developed for wireless applications. No clean solder paste made with alloys Sn/Ag (Supplier a), Sn/Ag/Cu (Supplier B), CASTIN (Supplier C) and SnBi (Supplier D) from various vendors have been evaluated for the implementation. The process evaluation conducted in this research study investigated the following aspects i) occurrence of voids ii) Effect of lead free solder on the UBM metallization, iii) wetting behavior of the lead (Pb) free solders, iv) thermal aging and shear strength of the, lead free solders in first and second level process and v) accelerated thermal cycle experiments on assembled lead free solder samples.