Development and RF Characterization of High Density Integrated Substrate Technology

Abstract

Advanced micro-systems for national security needs will require miniaturization and integration of radio frequency (RF), digital and analog electronics, optics, and microelectromechanical systems (MEMS) on a single substrate. To meets these demands we have developed a high density integrated substrate technology (HDIST) using Benzocyclobutene (BCB)/copper (Cu) with embedded thin film passive components for RF applications. We have developed processes to fabricate HDIST on Si, Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> and low temperature co-fired ceramic wafers. We have built a multilayer stack of six metal and five BCB layers using 5-m and 10-mum thick photo-definable BCB dielectric and 2- to 3-mum thick Cu conductor. We have also fabricated embedded inductors, in-plane and in 3-D, ranging in values from 750 pH to 42 nH, embedded TaN thin-film resistors with dc values ranging from 10 Omega to 10 kOmega and embedded capacitors ranging in values from 48 pF to 110 nF. We have designed, fabricated and characterized RF performance of this technology. To meet designed RF circuit characteristics, high dimensional accuracy was needed. We have made process refinement to get dimensional control within +/-0.5 mum of target dielectric thickness and +/-0.5 mum of target metal line width. This resulted in measured RF performance matching simulated (target) performance. The results show that the insertion losses in transmission lines range from 0.025 to 0.052 dB/mm. We have also fabricated and tested two types of RF filters in HDIST structure-Ku band coupled line filter and 2-GHz low pass filter. In addition, we have also incorporated and characterized embedded inductors and capacitors at high frequencies. Overall, RF results show that HDIST is well suited for high density RF circuits. We are currently developing a next generation of miniaturized circuits called Integrated System-On-A-Chip. In this technology, we will use integrated substrate technology to stack wafers in 3-D and make electrical connections through the stacked wafers.