Development and Performances Comparison of Memory Architectures for Multiprocessor System on Chip at the SystemC/TLM

Abstract

AbstractPerformance estimation of multiprocessor system-on-chip at a high level of abstraction is essential to address today’s growing electronic design challenges and the complexity of software applications. As well, minimizing the data transfer time, between the memory and the processing unit, remains a major problem to ensure real-time, especially with complex algorithms that use more data. We present in this paper, a development description of the mono processor open-access platform, the Library of Power and Temperature at the Transaction-Level-Modeling (LIBTLMPWT) based on a Microblaze soft-core processor, built using SystemC at Transaction-Level Modeling (TLM) with shared memory architecture, towards the Multiprocessor System on Chip platform (MPSoC). The paper describes and compares two memory architectures: shared memory architecture and distributed data memory architecture for MPSoC. Thus, the paper proposes a description and comparison of the performance estimation of the two architectures for platform speed, temperature, and power consumption. While based on different benchmarks of the game of life application.KeywordsShared memoryMPSoCSystemCPerformance