Abstract
The objective of this paper is Development and Implementation of parallel to serial data converter using Aurora protocol for high speed serial data transmission at the rate of 3.125Gbps by using architectural features of Virtex-7 FPGA. It involves the study and configuring the Xilinx Core Generator Tool to achieve the required high speed serial data transmission by using of Aurora 8b/10b Protocol & Multi-Gigabit Transceivers present in Virtex-7 FPGA. Firstly, a 192-bit parallel data is generated using simulators, which is implemented using VHDL language. The 192-bit data is sent to Asynchronous First-In First-Out (AFIFO) as input and produces an output of 32-bit parallel data. This data is sent to the aurora module in parallel form as successive frames (i.e. 6 frames, each frame consists of 4 bytes). Finally, the 192-bit parallel data is transmitted to the receiver module serially over fiber optic cable at the rate of 3.125Gbps using architectural features of virtex7 FPGA. Finally, the data is transmitted on dual independent aurora channels and the entire logic will be tested for its complete functionality in standalone mode by porting on to the Virtex-7 FPGA based custom Hardware. Keywords: Aurora Protocol, Independent Aurora Channels, Serial Data Transmission, Virtex-7 FPGA, AFIFO, GTX TILE, MGT’s
Highlights
Communication plays one of the most significant role in day to day life
These Multi Gigabit Transceiver (MGT)’s are present in the Virtex-7 FPGA as hard IPs and we have to interface to our application by configuring hard IPs using soft IPs such as aurora core to achieve the high speed serial data transmission
Multi Gigabit Transceiver (MGT) is a Serialiser /Deserialiser (SerDes) it can be operated at serial bit rates above 1 Gigabit/second
Summary
The Aurora 8B/10B protocol is implemented by the Logic CORETM IP Aurora 8B/10B core using the high-speed serial Transceivers on the Virtex-7 LXT, SXT, FXT, and TXT Family[5]. The Aurora 8B/10B core is a lightweight, scalable, link layer protocol for high-speed serial communication. The protocol is open source and can be implemented using Xilinx® FPGA technology. The protocol is typically used in applications requiring, low-cost, simple, high rate, data channels. In our application virtex[7] FXT is used because it supports High-performance embedded systems with advanced serial connectivity. The source code is produced by the CORE Generator software for Aurora 8B/10B cores with variable data path width. The cores can be simplex or full-duplex
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