Abstract
Focused ion beam (FIB) and nano-probing were applied for failure analysis of three-dimensional stacked circuits with copper through-silicon-vias between the stacked chips. The failure analysis was done after high temperature storage and thermal cycling tests. Passive voltage contrast in FIB allowed to pinpoint the open sites. FIB cross-sections showed the presence of opens at the bottom of the copper vias. The failure cause was suspected to be an interlayer particle, which was confirmed by optical profilometry. Nano-probing was used on another sample to pinpoint the failure location through the measurement of the local resistance within the daisy chains. The failure was traced out to be related with surface contamination.
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