Detecting the phase behavior on cache performance using the reuse distance vectors

Abstract

Abstract Previous studies proposed several code signatures, with large vector dimensions and time-consuming profiling processes, to detect phase transitions of the overall processor performance. However, there still lacks an effective and efficient method to detect and leverage the phase characteristics of memory access. In this paper, we propose the reuse distance vector (RDV), a new metric that tightly coupled with the cache performance, to summarize the phase behavior in the memory hierarchy. Different from the commonly seen huge dimensionality of other code signatures, RDVs are measured at very low dimensions. Meanwhile, the profiling overhead can be further reduced by our sampling technique. Based on RDVs, we can pick simulation points from the whole program via a clustering method to act as the representative subset to reduce the time consumption of cycle accurate simulations. Using the simulation points found by RDVs, the average relative error of cache miss rate estimation is as low as 1.08%, which outperforms the accuracies of BBVs and EIPVs by 79% and 22% (all compared methods use the same number of simulation points that takes merely 0.4% of the whole program). Meanwhile, the average errors of MLP and the cache miss service time are only 0.9% and 1.8%, respectively.