Detecting Hardware Covert Timing Channels

Abstract

Information security and data privacy have steadily grown into major concerns in computing, especially given the rapid transition into the digital age for all needs--from healthcare to national defense. Among the many forms of information leakage, covert timing channels can be dangerous primarily because they involve two parties intentionally colluding to exfiltrate sensitive data by subverting the underlying system security policy. The attackers establish an illegitimate communication channel between two processes and transmit information via resource timing modulation, which does not leave any physical activity trace for later forensic analysis. Recent studies have shown the vulnerability of many popular computing environments, such as cloud computing, to these covert timing channels. With the advancements in software confinement mechanisms, shared processor hardware structures will be natural targets for malicious attackers to exploit and implement their covert-timing-based channels. In this work, the authors present a microarchitecture-level framework that detects the possible presence of covert timing channels on shared hardware. Their experiments demonstrate their ability to successfully detect different types of covert timing channels on various hardware structures and communication patterns.