Detailed Device-Level Electrothermal Modeling of the Proactive Hybrid HVDC Breaker for Real-Time Hardware-in-the-Loop Simulation of DC Grids

Abstract

This paper proposes a series of proactive hybrid high-voltage direct-current (HVDC) breaker (HHB) electromagnetic transient models that can be implemented in hardware-in-the-loop (HIL) emulation for real-time execution on the field-programmable gate array (FPGA). To achieve high fidelity, an HHB model should have the same configuration as the real one, and three different models for an insulated-gate bipolar transistor (IGBT), i.e., a two-state switch model, a curve-fitting model, and an improved nonlinear behavioral model, are proposed to satisfy different accuracy and simulation speed requirements. Since designing an HHB with hundreds of IGBTs in a massive array would lead to an extremely heavy computational burden as well as to a high FPGA resource utilization, circuit partitioning is applied to each model, which enables decomposition into a number of physically independent subcircuits with smaller matrix dimension to exploit parallel implementation. Meanwhile, low hardware resource demand is achieved by using one of the subcircuits to represent the rest since they are identical. As the IGBTs produce a significant amount of heat, which in turn affects their performance, an electrothermal network is added as part of the model to provide specific information about the device's operation status including the junction temperature. The models are applied to a three-terminal HVDC system, where line faults are simulated to activate HHB protection sequence. Comparison of device-level and system-level performance from HIL emulation with those of commercial offline simulation tools validates the accuracy of the proposed models as well as the efficacy of the solution approach.