Abstract
Desing of VLSI Architecture for a Flexible Test Bed of Artificial Neural Network for Training and Testing on FPGA
Full Text
Sign-in/Register to access full text options
Published version (Free)
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: Zenodo (CERN European Organization for Nuclear Research)
Paper Title
Journal
Date