Designs of parasitic tolerant switched-capacitor filters using unity-gain buffers

Abstract

Designs of second-order sampled-data filters, bilinearly equivalent to their analogue counterparts, are presented using unity-gain amplifiers (UGAs) and switched capacitors (SCs). The number of UGAs, capacitors and switches is comparable to the number of operational amplifiers (OAs), capacitors and switches in designs that employ OAs as infinite-gain amplifiers. Consequently, the proposed designs should offer significant potential savings of the substrate area in monolithic fabrications compared with designs based on OAs. Further, the UGA-based designs should extend the frequency range of applications of the SC filters. Realisations are bottom-plate parasitic insensitive. The effect of the top-plate parasitic capacitances has also been studied in detail, and an algorithm to yield a parasitic tolerant design along with minimum total capacitance has been proposed. The effect of the offset voltages in the UGAs on the filter response has been examined and guidelines given to minimise its effect. Extensive numerical simulations on a computer have revealed that filters derived from the proposed designs are compatible with the state of the art in IC MOSFET technology. In the absence of MOS IC fabrication facilities, experimental tests were conducted using discrete components and UGAs realised from OAs. Results of numerical simulations and experimental tests closely agree with each other.