Designing Underfill Material in Resolving Package High Coplanarity Issues

Abstract

In recent years, chipsets are doing more functions as compared to few years ago. As a result, the package form factor has to increase to accommodate the added functions. During the development of flip chip ball grid array generation X (FCBGA-x), high coplanarity yield loss was observed on test vehicle of die size 550 sq mils and form factor of 42.5 sq mm. Aside from the coplanarity yield loss, it also posed a reliability concern especially post motherboard reflow. This has raise concern to the platform. Few options were proposed to mitigate this yield loss. Amongst the options being explored include tightening the technology target specifications (TTS) envelope, variable solder resist opening (VSRO), restrainer, using head spreader lids, alternative underfill (UF) material or process and also combination options, i.e. VSRO. The ideal case is to improve coplanarity without any cost adder, either from material or process, standpoint. In order to minimize the coplanarity yield loss, a breakthrough solution is needed. Through empirical data collected from previous platforms, one of the key contributors that increased the package coplanarity was during epoxy cure. With strong understanding of materials and process interactions, a team was formed to march towards formulating an innovative underfill material. There is a balancing act required during the development process. By reformulation of the underfill material and change of the cure recipe, an improvement of package coplanarity is anticipated. At the same time, there will be also unknown reliability risks die level and die crack performance. Hence, there is a need to consider all the tradeoffs when selecting the underfill formulation. With a strong team work within Intel & with Supplier, 4 underfill iterations were successfully put to the test. An underfill has successfully made an improvement of 1 mil to the coplanarity, bringing down the yield loss significantly based on 4 DOEs. This paper documents the challenges in enabling this underfill to mitigate coplanarity yield loss, as well as the reliability data.