Designing Ultra Low-k Dielectric Materials for Ease of Patterning

Abstract

AbstractOrganosilicate materials with dielectric constants (k) ranging from 3.0 to 2.2 are in production or under development for use as interlayer dielectric materials in advanced interconnect logic technology. The dielectric constant of these materials is lowered through the addition of porosity which lowers the film density, making the patterning of these materials difficult. The etching kinetics and surface roughening of a series of low-k dielectric materials with varying porosity and composition were investigated as a function of ion beam angle in a 7% C4F8/Ar chemistry in an inductively-coupled plasma reactor. A similar set of low-k samples were patterned in a single damascene scheme. With a basic understanding of the etching process, we will show that it is possible to proactively design a low-k material that is optimized for a given patterning. A case study will be used to illustrate this point.