Designing optoelectronic integrated circuit (OEIC) receivers for high sensitivity and maximally flat frequency response

Abstract

This paper examines previously overlooked, but a highly effective, optimization approach to designing transimpedance OEIC receivers based on heterojunction bipolar and field-effect transistors (HBT's & HFET's) with high sensitivity and maximally flat frequency response. It is shown that the 3-dB bandwidth of amplifiers involving single-transistor common-emitter (CE) and common-source (CS) input stages, and the corresponding cascoded input stages can be universally expressed as f/sub 3-dB//spl cong/1/2/spl pi//spl radic/(/spl tau/'(c/sub /spl mu//+c/sub L/)R/sub f/), where /spl tau/' is the effective transit time of the transistor including the effect of the photodetectors capacitance, c/sub /spl mu// is the feedback capacitance of the transistor, c/sub L/ is the capacitance in parallel to the collector or drain effective load conductance (g~/sub L/), and R/sub f/ is the feedback resistance of the amplifier that ensures a much greater than unity loop-gain. The gain-bandwidth product can also be universally expressed as R/sub f//spl times/f/sub 3-dB//spl cong/g/sub m///spl radic/2/spl pi/g~/sub L/c/sub in/, where gm is the transconductance of the transistor and c/sub in/ is the total capacitance appearing at the input of the respective amplifier. For the single-transistor CE and CS input stages the dependence of the optimum values of R/sub f/ on g~/sub L/ can be expressed as R/sub f/=2/spl tau/'(c/sub /spl mu//+c/sub L/)/(g~L/spl tau/'+c/sub /spl mu//)/sup 2/, whereas for the corresponding cascoded input stages the same expression also applies but with c/sub /spl mu//=0 in the denominator. Since designing high sensitivity OEIC receivers require high values of R/sub f/ and correspondingly low values of g~/sub L/, thus it follows that amplifying transistors must be operated at the lowest possible current but without degradation of their high frequency performance. A low-value of the base or gate bias current also ensures a low level of shot noise thus further enhancing the sensitivity. Because of a low g/sub m/ to drain current ratio in HFET's, receivers involving only the cascoded input stage, and not the single-transistor CS input stage, are capable of providing both high sensitivity and high bandwidth. In contrast, receivers based on HBT's involving either the simple CE input stage or the cascoded input stage are capable of providing both high sensitivity and high bandwidth. Design examples, using HBT's and HFET's with intrinsic unity current gain frequency f/sub /spl tau//=160 GHz and very low-capacitance msm photodetectors, indicate that high-speed receivers can be realized with bandwidth f/sub 3-dB//spl cong/20 GHz, and sensitivity as high as -28.7 dBm.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>