Abstract
AbstractConventional memory elements code information in the Boolean “0” and “1” form. Devices that exceed bistability in their resistance are useful as memory for future data storage due to their enhanced memory capacity, and are also a necessity for contemporary applications such as neuromorphic computing. Here, with the aid of an experimentally validated device model, design rules are outlined and more than two stable resistance states in a graphene ferroelectric field‐effect transistor are experimentally demonstrated. The design methodology can be extrapolated for on‐demand introduction of multiple resistance states in ferroelectric transistors for applications both in data storage and neuromorphic computing.
Highlights
Memory devices play central role in the hardware-based implementation of artificial neural networks (ANNs).[45]
Resistance switching in 2D-material-based ferroelectric field- figure of merit in this hardware-based approach is the mapeffect transistors (Fe-FETs)[1] is achieved by modulation of ping of the coupling between neurons that are found in biology charge carrier density and thereby conductance of the 2D mate- in the device memory state.[46]
Based on the insight gained from the model, we propose introducing several trenches with various thicknesses within the ferroelectric gate layer to achieve multiple (>2) resistance states in a single transistor with deterministic resistance switching voltages
Summary
Memory devices play central role in the hardware-based implementation of artificial neural networks (ANNs).[45] The. Resistance switching in 2D-material-based ferroelectric field- figure of merit in this hardware-based approach is the mapeffect transistors (Fe-FETs)[1] is achieved by modulation of ping of the coupling between neurons that are found in biology charge carrier density and thereby conductance of the 2D mate- ( known as synaptic weight) in the device memory state.[46]. Asadi Humboldt Research Group Max-Planck Institute for Polymer Research gradual modulation of resistance have been reported in the past.[53,54,55,56] specific design principles for on-demand introduction of the number of states in Fe-FETs based on the needs of a specific application have not been reported yet. The methodology allows for developing memory cells with multiple number of states that are predefined through design. The results provide valuable guidelines for realization of multi-level ferroelectric transistors for applications ranging from data storage to neuromorphic computing
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