Designing Low Cost Secured DSP Core using Steganography and PSO for CE systems

Abstract

Digital signal processing (DSP) cores are an essential component of consumer electronics (CE) systems. These DSP intellectual property (IP) cores are prone to threats such as piracy and counterfeiting and therefore need security using sophisticated low-cost techniques. This paper presents a novel low-cost security approach for designing a low-cost DSP hardware core using a signature-free steganography algorithm and particle swarm optimization (PSO). The proposed security methodology achieves higher robustness (i.e., stronger digital evidence as evident from the lower probability of coincidence) and lower design cost than state-of-the-art watermarking approaches. The proposed method integrates IP steganography with PSO-based Design Space Exploration (DSE) to generate low-cost secured DSP hardware architecture. This work also demonstrates the proposed approach on discrete cosine transform (DCT) IP core.