Abstract
As the technology of Internet of Things (IoT) evolves, abundant data is generated from sensor nodes and exchanged between them. For this reason, efficient encryption is required to keep data in secret. Since low-end IoT devices have limited computation power, it is difficult to operate expensive ciphers on them. Lightweight block ciphers reduce computation overheads, which are suitable for low-end IoT platforms. In this paper, we implemented the optimized CHAM block cipher in the counter mode of operation, on 8-bit AVR microcontrollers (i.e., representative sensor nodes). There are four new techniques applied. First, the execution time is drastically reduced, by skipping eight rounds through pre-calculation and look-up table access. Second, the encryption with a variable-key scenario is optimized with the on-the-fly table calculation. Third, the encryption in a parallel way makes multiple blocks computed in online for CHAM-64/128 case. Fourth, the state-of-art engineering technique is fully utilized in terms of the instruction level and register level. With these optimization methods, proposed optimized CHAM implementations for counter mode of operation outperformed the state-of-art implementations by 12.8%, 8.9%, and 9.6% for CHAM-64/128, CHAM-128/128, and CHAM-128/256, respectively.
Highlights
As the Internet of Things (IoT) environment evolves, the embedded processor has rapidly developed
Proposed implementations of CHAM block cipher were tested on the target device
We presented optimization implementations of lightweight CHAM block cipher on low-end 8-bit AVR
Summary
As the Internet of Things (IoT) environment evolves, the embedded processor has rapidly developed. The encryption requires an expensive computational overhead on low-end IoT devices with limited computing power, low energy capacity, and small storage. For this reason, lightweight block ciphers have been actively studied, which can be implemented in an efficient manner even under certain limitations. We proposed the optimized CHAM block cipher on 8-bit Alf and Vegard’s. RISC (AVR) microcontrollers that applied suitable optimization techniques for Addition, Rotation, and eXclusive (ARX)-based block ciphers. The counter mode of CHAM block cipher was accelerated with pre-calculation. The encryption with a variable key was optimized with on-the-fly table calculation. To achieve the compact implementation, we used 8-bit AVR microcontrollers-specific
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