Designer's Issues in 3D IC

Abstract

3D IC is approaching the center of activity in the semiconductor business with many justified theoretical reasons and convincing technical results. With skyrocketing cost for lithography and IC fabrication 3D IC seems clearly a way to go. The question is when, and in what applications first. Despite many papers on the processing and assembly technology and design methodology for 3D IC, there are, however, a horde of problems yet to be solved. Roughly these issues are classified into process technology, manufacturing, thermal-related, applications-related, or design. For each of these problems there will be either some solutions or detours; technology and manufacturing issues will be solved, thermal physics have to be obeyed and some good guidelines and design methods will be developed in time. Eventually commercial 3D IC will make its debut first in application areas where cost issue prefers 3D IC to 2D implementation or SiP. Mobile, ubiquitous, and medical applications will be serious markets for 3D IC, because of the clear and urgent need for low energy consumption, functional integration, reliability, and low/medium cost in those applications. These application call for independent or autonomous devices in that they not only perform a spectra of functions from sensing, conversion, storage, processing, and external wireless interaction but also monitoring and managing the energy resource according to the dynamic workload estimation. It should also be able to delegate some portion of compute-intensive processing to outside servers when remaining energy is not sufficient, or report its status on the remaining energy for service call for battery replacement. Deploying independent/autonomous systems on 3D IC to these market is expected be quite relevant in a near future due to the technology readiness, cost affordability, and rising applications demand. Exploiting another axis, z-axis, to realize independent/autonomous systems is mapping various algorithms, possibly via some architecture tweaking, onto the physical skeleton offered by the multiple tiers of chip plane. TSV(thru-silicon via) is an opportunity which must be scrupulously used because it eats up precious 2D area it wanted to save and complicates the routing when excessively used. Architecture of each plane in 3D IC, i.e., processor plane, memory (stack of) planes, along with interconnection network needs to be modified along with the algorithm to best benefit from the gift of 3D IC, i.e., availability of TSV. In this talk, I will give some examples on how information processing, storage, and communication can avail from 3D IC. In summary, as long as we know the right number of TSV's and where to place them, and perform the algorithm/architecture co-design along with the energy management in action, we are on our way to prosperity with our new dimension!