Abstract
Reverse bandgaps generate PVT-independent reference voltages by means of the sums of pairs of currents over individual matched resistors: one (CTAT) current is proportional to VEB; the other one (PTAT) is proportional to VT (Thermal voltage). Design guidelines and techniques for a CMOS low-power reverse bandgap reference are presented and discussed in this paper. The paper explains firstly how to design the components of the bandgap branches to minimize circuit current. Secondly, error amplifier topologies are studied in order to reveal the best one, depending on the operation conditions. Finally, a low-voltage bandgap in 65 nm CMOS with 5 ppm/°C, with a DC PSR of −91 dB, with power consumption of 5.2 μW and with an area of 0.0352 mm2 developed with these techniques is presented.
Highlights
Bandgap (BG) voltage references are widely used in integrated circuits, since each provides a constant voltage, regardless of process, power supply voltage and temperature (PVT) variations
For the defined output voltage VREF,n which is defined as the peak value of the BG curve in nominal condition), R3 should be designed according to the equation: R3 =
Such constant deviations are compensated by digitally-controlled trimming on R3 in a resistive array whose design is driven by the trade-off between complexity and accuracy (TC is not affected by the trimming circuit)
Summary
Bandgap (BG) voltage references are widely used in integrated circuits, since each provides a constant voltage, regardless of process, power supply voltage and temperature (PVT) variations. Voltage-mode BGs cannot be used, since the natural silicon bandgap voltage of 1.25 V would be higher than the supply A R-BG circuit was developed in 65nm-CMOS technology to operate with a 1 V supply consuming 5.2 μW with 1% VREF accuracy in the temperature range [−40, 100] ◦ C, and the DC-PSRR was below −91 dB VDD (solid line) or GND (dashed line), depending on the PSR frequency compensation
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