Abstract

In this study, we designed a 5-bit K-band CMOS switch type phase shifter. In order to minimize phase and gain errors, a design technique for bits constituting the phase shifter was proposed. The proposed design technique has been achieved by adjusting the resonant frequencies of inductance and capacitance in the L-C-L T-type low pass filter structure. Through this, a method of optimizing the phase shifter with the T-type low pass filter structure was presented. The K-band 5-bit phase shifter was designed with a 65 nm CMOS process to verify the feasibility of the proposed design technique. The core size was 0.78 × 0.21 mm2. At the frequency ranges of 22.0 to 23.0 GHz, the insertion loss and RMS phase and gain errors were measured to be 7.44 ± 2.0 dB, 2.6°, and 1.2 dB, respectively.

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