Abstract
We perform a simulation-based analysis on the potential of emerging ferroelectric tunnel junctions (FTJs) as a memory device for crossbar arrays. Though FTJs are promising due to their low power switching characteristics compared to other emerging technologies, the greatest challenge for FTJs is the tradeoff between integration density and read performance. Our analysis highlights the need to co-optimize the ferroelectric thickness of the FTJ and read/write voltages to achieve proper functionality at large array sizes. Our analysis shows that FTJ-based crossbar achieves 93% higher sense margin at isoread power of 116 nW (per bit), but this FTJ design comes at a cost of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$9.28\times $ </tex-math></inline-formula> higher write power at isowrite time of 250 ns. In response, we study the potential tradeoffs of design points outside the feasible region to understand what device characteristics are desired to overcome such challenges.
Highlights
Emerging non-volatile memory (NVM) technologies have gained considerable attention as an embedded memory for mobile computing and internet-of-things (IoT) applications [20] [28]
The tunnelling barrier height is tuned based on the polarization of the ferroelectric material which creates the distinguishability between the high resistance state (HRS) and low resistance states (LRS)
We demonstrate how the unique properties that ferroelectric tunnel junction (FTJ) bring to the table translate into system-level advantages as emerging ferroelectric memory technologies become more mature in the future
Summary
Emerging non-volatile memory (NVM) technologies have gained considerable attention as an embedded memory for mobile computing and internet-of-things (IoT) applications [20] [28]. Among the emerging ferroelectric memories, the ferroelectric tunnel junction (FTJ) is a two-terminal resistance-change memory device [16] which sandwiches a thin ferroelectric layer between two electrodes. The crossbar array architecture maximizes the integration density of emerging two-terminal NVM technology by averting the use of access transistors and enabling 3D stacking. The design space and co-optimization between magnetic tunnel junction (MTJ) and two-terminal selector devices have been well-studied over the past few years [1] [3] [14]. While FTJ is relatively new compared to the more mature emerging technologies, our design space exploration sheds light on how to design the ferroelectric thickness of FTJs around state-of-art selectors, e.g. metal-insulator-insulatormetal (MIIM) diode [10], to achieve functional correctness while accounting for process variations. Our analysis provides key insights into how to optimize upon the device-level advantages inherent to FTJs to bring about new array-level design points that MTJs cannot achieve
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