Abstract
This paper proposes a design methodology for ultra-low-power CMOS radiofrequency (RF) transceivers building blocks. The key parameters of this methodology are the inversion coefficient of CMOS transistor and the extracted equations of passives components introduced in the architecture of the RF building block. The approach of proposed methodology consists of a trade-off between the power consumption and the others RF parameters such as gain, linearity, noise and bandwidth. Two analog RF design examples have been studied in details in order to clarify the design flow and effectiveness of the proposed methodology. A down-conversion mixer and a voltage-controlled oscillator have been implemented in CMOS technology; the obtained results have been compared to others of the state of the art.
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