Abstract

Content addressable memories (CAMs) are a promising category of computing-in-memory (CiM) elements that can perform highly parallel and efficient search operations for routers, pattern matching, and other data-intensive applications. Various magnetic tunnel junction (MTJ) based content addressable memory (CAM) designs have been proposed to realize zero standby power and high performance search. However, due to the relatively small tunnel magneto-resistance (TMR) ratio, MTJ based CAMs require extra transistors and differential MTJ branches to distinguish between the parallel and anti-parallel resistance states, resulting in significant area and energy overhead. In this paper, we propose a device-circuit co-design approach for an ultra-compact CAM design by only exploiting an 1T-1MTJ structure in each cell. We propose a 2-step search scheme to enable the parallel in-memory search operation across the proposed CAM array, and demonstrate the sufficient sensing margin of the array in a successful search operation. Evaluation results suggest that our proposed 1T-1MTJ based CAM design improves 179X/301X area efficiency compared with the state-of-the-art 15T-4MTJ/20T-6MTJ CAM design. Application benchmarking on hyperdimensional computing (HDC) inference shows a 54.6X/12.8X speedup compared with GPU/20T-6MTJ CAM based approaches.

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