Abstract

Comparing with the traditional phase meter, the design of digital phase meter with GPIB interface based on FPGA have some advantages, such as the high date transmission rate, the simple circuit, short design cycle and the lower price. The principle of this design meets with the standard of IEEE488.2 and use Verilog HDL language to design every interface. Then compile simulate it in Quartus II. Finally download it to the FPGA experiment board to realize every function. It makes the date transmission more stable and reliable through the design of GPIB interface

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