Abstract
A soft-switching hybrid DC-DC converter with a 2-phase switched capacitor is proposed for the implementation of a fully-integrated voltage regulator in a 65 nm standard CMOS process. The soft-switching operation is implemented to minimize power loss due to the parasitic capacitance of the flying capacitor. The 2-phase switched capacitor topology keeps the same resonance value for every soft-switching operation, resulting in minimizing the voltage imbalance of the flying capacitor. The proposed adaptive timing generator digitally calibrates the turn-on delay of switches to achieve a complete soft-switching operation. The simulation results show that the proposed soft-switching hybrid DC-DC converter with a 2-phase 2:1 switched capacitor improves the efficiency by 5.1% and achieves 79.5% peak efficiency at a maximum load current of 250 mA.
Highlights
Developing a fully integrated voltage regulator (FIVR) is one of the design challenges for digital systems [1,2,3,4]
The SC DC-DC converter can be implemented with the integrated high-density capacitors, there is a limitation to implementing the wide-range input and output with high efficiency
The SC DC-DC converter can achieve high efficiency at only certain conversion ratios determined by the topology due to the charge sharing loss between capacitors
Summary
Developing a fully integrated voltage regulator (FIVR) is one of the design challenges for digital systems [1,2,3,4]. The SC DC-DC converter can be implemented with the integrated high-density capacitors, there is a limitation to implementing the wide-range input and output with high efficiency. The SC DC-DC converter can achieve high efficiency at only certain conversion ratios determined by the topology due to the charge sharing loss between capacitors. The reconfigurable SC can provide the wide-range input and output by adjusting conversion ratios based on the input voltage and required output voltage It requires many switches and cascaded connections from input to output, and so the maximum output current is limited by large conduction losses. The hybrid converter can support wide-range input and output voltages by controlling the duty cycle, like the conventional inductor-based switching DC-DC converter. A fully-integrated hybrid DC-DC converter with an adaptive dead-time technique and a 2-phase SC is proposed to eliminate the effects due to the parasitic capacitance of the capacitors in a standard CMOS process
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