DESIGN OF SHARED BUFFER ARCHITECTURE FOR CPU-GPU ON CHIP NETWORK

Abstract

To achieve high-performance and energy optimized computing the GPU-CPU heterogeneous architectures are standout choice. Streaming multiprocessors (SMs) are increasing to boost throughput in GPUs. Design of on-chip interconnect for GPUCPU diverse system is a challenge to make it scalable and efficient. Mesh network is being used in many core CPUs but for GPU it consumes more area and power as well, due to traffic pattern of GPU. Crossbar is good fit, but it is not supporting communication among the SMs when numbers of SM are high. The motivation is to design the scalable crossbar which provide communication between SMs and SM to memory unit. The objective here to design two types of crossbar with shared buffer, crossbar local and global. Crossbar local provides communication among SMs and take all the input request which are going to the memory in coincide manner and pass it to crossbar global that di-varicate these request to memory unit, Last-level cache as well as memory controllers. Sharing buffer give opportunity to all input for communication way efficient to achieve high throughput with reduce area and power Compare to mesh network in Shared buffer crossbar network reduction in area 28% and power 32%. Scalability of design is verified by increasing the number of SMs.