Design of sequential logic circuits based on Evolvable Hardware

Abstract

The advantage of Evolvable Hardware over the traditional circuit design approach is its capacity for dynamic and autonomous adaptation. EHW can reconfigure its structure according to changes in the task requirement or the environment in which the EHW is embedded. Focuses on the application of extrinsic evolution and their used for the design of small sequential circuits. At the foundation of evolvable hardware, a full-connected feed-forward circuit network model was constructed which is based on the character of sequential circuits. This model is imitating the structure of artificial neural network. It firstly using D flip-latch and logic gate as the basic element, and the one-to-one mapping existed in the mathematical encoding, circuit topology, and HDL file was established. Then, the method to obtain HDL file according to circuit encoding was designed, the circuit evaluation process was automated by using of batch processing technology. Designed the mutation rate dynamic adjust function to improve the performance of (1+λ)-ES. Experiment results of two types of Finite State Machine proved the feasibility and validity of the circuit evolution method.