Design of real-number checksum codes using shared partial computation for CED in linear DSP systems

Abstract

We introduce a framework for the design of low-overhead real-number checksum codes for concurrent error detection in linear DSP systems. Low overhead is achieved by using shared partial computations between the DSP system and its checking circuitry. The main issue is concerned with how the partial computations are shared without compromising fault coverage since any sharing can introduce errors into both the DSP system and its checking circuitry. While exploring the design space, fast fault coverage estimators are used. For hardware-shared implementations, we obtain fault coverage exceeding 95%, with average computation overhead of only 15%. When sharing of intermediate computations in the flow-graph is implemented, we obtain 20% reduction in the number of arithmetic operations without loss of fault coverage.