Design of PSO-Based Optimal/Tunable PID Fuzzy Logic Controller Using FPGA

Abstract

Fuzzy Logic controllers have been successfully applied in a large number of control applications, with the most commonly used controller being the PID controller. Fuzzy logic controllers provide an alternative to PID controllers, as they are a good tool for the control of systems that are difficult to model. The control action in fuzzy logic controllers can be expressed with simple “if-then” rules (Poorani et al., 2005). Fuzzy controllers are more sufficient than classical controllers as they can cover a much wider range of operating conditions than classical Controllers. In addition, fuzzy controllers operate with noise and disturbances of a different nature. The common method for designing a fuzzy controller is to realize it as a computer program. Higher density programmable logic devices, such as the FPGA, can be used to integrate large amounts of logic in a single IC. The FPGA provides greater flexibility than ASIC, and can be used with tighter time-to-market schedules. The term programmable highlights the customization of the IC by the user. Many researchers have discussed the design of the hardware implementation of fuzzy logic controllers. A number was specialized for control applications, and aimed to get better control responses. These researches have concern using new techniques in fuzzy control, in order to get higher processing speed versus low utilization of chip resource (Jain et al., 2009 and Islam et al., 2007) The hardware implementation of fuzzy logic controllers has many requirements, such as high-speed performance, low complexity and high flexibility (Leonid, 1997). With this type of application, and to provide these requirements, it is necessary to avoid various limitations and challenges. In deriving a practical PIDFC structure, it is desirable to reduce the number of inputs. In addition, it is difficult to formulate the fuzzy rules with the variable sum of error ( e ∑ ), as its steady-state value is unknown for most control problems (Mann et al., 1999), (Hassan et al., 2007), (Obaid et al., 2009). Hence, it is necessary to design the FPGAbased PIDFC with fewer inputs and rules to get higher processing speed versus low utilization of chip resources. In addition, the design of digital fuzzy controllers has limitations concerning the structure. These include the restriction or limitation of the shapes