Design of phase measurement system using Hybrid Dual D-FIFO-FF synchronizer and PWM based duty cycle computation

Abstract

Phase measurement system (PMS)s are playing the major role in real time communication applications. The digital PMS measures the exact value of phase compare to the analog PMS devices. However, the conventional digital PMSs failed to measure the accurate phase value and consumed the higher hardware resources like area, delay and power. Therefore, this work is focused on implementation of Hybrid Digital-PMS (HD-PMS) module for efficient phase value estimation. Initially, Hybrid Dual Data-First-In-First-Out-Flip Flop (D-FIFO-FF) synchronizer is introduced to improve the synthesis the data inputs, which synchronizes the data inputs with variable clock frequencies. Then, Phase Detector (PD) is used to identify the phase difference between data input1, data input 2. The PD is developed using XOR logical operation, which is high speed and area efficient. Then, data input1, data input 2 frequencies are changed by modifying the duty cycles through Pulse Width Modulation (PWM) controller. Here, PWM is used to change the duty cycles of data inputs using phase difference generated from PD. Finally, Phase Value Computation (PVC) module is introduced to estimate the digital phase levels using arithmetical operations using duty cycle levels. The simulations conducted using XILINX-ISE 14.7 reveled that, the proposed HD-PMS consumed lower hardware resources like look-up-tables (LUT), LUT-FFs, slice registers, path delays and power consumptions as compared to other PMS approaches.