Design of NoC with Low Power Based on Power Gating

Abstract

Network on Chip (NoC) has been considered as a new paradigm in the next generation communication architecture due to its extensibility and high performance. However, increased power consumption has reduced the reliability of NoC and hindered its wide-deployment. In this paper, we propose a new design of NoC with low power based on Power Gating technique, which can switch routers on or off by monitoring each port of routers. We simulate and evaluate the router and NoC with proposed method and the results indicate that it is effective in reducing static power and improving reliability.