Abstract
In the present paper, an operational amplifier (Op-Amp) topology that achieves high-gain and low-power dissipation is designed and analyzed. The design uses a current mirror with a class-A output stage having capacitive Miller compensation. The low power operational amplifier is the main active power consuming block. The proposed Op-Amp operates at ±0.75V supply voltage and consumes a total power of 1.83mW with the gain aamp;#x2265; 90dB. The proposed design has been implemented using Tanner EDA Tools for 90nm CMOS technology node.
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