Abstract
AbstractMultiplication is used in digital systems mostly because it is one of the main arithmetic functions. There are three steps for multiplication, which are partial product generation, partial product reduction to two rows and using a ripple carry adder (RCA) tree for final addition of the binary results. The second part mainly contributes to time delay, amount of power consumed and the complexity of the design. Hence, we enhance the efficiency of this stage by using proper arithmetic blocks, such as compressors, to directly improve the performance and energy efficiency of the multiplier. The goal of this paper is to introduce a few approximate 8x8 multipliers for low-powered and high-speed applications with a reasonable trade-off among accuracy, speed, area and power with the hybrid approach of inexact 4:2 compressors types.Keywords4-2compressorsApproximate compressorsApproximate multipliersNeighborhood processingUnsigned 8 × 8 multipliersSharpening and smoothening
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
