Design of low power VCO enabled quantizer in Continuous Time Sigma Delta ADC for signal processing application

Abstract

An accurate design of low power Voltage Controlled Oscillator (VCO) enabled quantizer in Continuous Time Sigma Delta ADC in 180nm CMOS technology using Tanner EDA tools is done. The proposed architecture consists of the loop filter, VCO quantizer and the DAC in the feedback side of model. The Operational Amplifier (OPAMP) used in designed of loop filters offers 40dB gain, 70 degree phase margin and unity gain bandwidth of 79.06MHz that consuming power of 3 mW. Even order harmonics of VCO are reduced by VCO quantizer loop structures. The Higher order loop filter is designed using an active Resistance and Capacitive based integrators and VCO quantizer is implemented using 15 multiple stage ring oscillator and register of DFF which provides an added advantage of low phase noise with frequency of 100 KHz rang. Remarkable power dissipation of overall circuit is 3mW.