Design of Low Cost Sigma-Delta Analog-to- Digital Converter for Audio Applications

Abstract

FPGA (Field-Programmable Gate Array) based solutions in consumer electronics have gained popularity due to low cost and high performance. The time-to market is also shorter and the financial risk is lower compared to ASIC (Application Specific Integrated Circuit). One component that is missing in a low-cost FPGA is the ability to convert an analog signal to its digital counterpart. The aim of this paper is to implement an ADC (Analog-to- Digital Converter) for audio applications using external components together with an FPGA (Field- Programmable Gate Array). The focus is on making the ADC low-cost and it is desirable to achieve 16-bit resolution at 48 KS/s. Since large FPGA’s have numerous I/O-pins, there are usually some unused pins and logic available in the FPGA that can be used for other purposes. This is taken advantage of, to make the ADC as low-cost as possible. This paper presents two types of converters an Σ- ∆ (Sigma-Delta) converter with a first order passive loop-filter and an Σ-∆ converter with a second order active loop-filter. The solutions have been designed on a PCB (Printed Circuit Board) with a Xilinx Spartan FPGA. Both solutions take advantage of the LVDS (Low-Voltage-Differential-Signaling) input buffers in the FPGA. First converter achieves a peak SNDR (Signal-to-noise-and-distortion-ratio) of 62.3 dB (ENOB (Effective number of bits10.06 bits)and it is very low-cost but is not suitable for high-precision audio applications. Second converter achieves a peak SNDR of 80.3 dB (ENOB 13.04) and the cost is more comparatively first one but it is more suitable for mono audio and for stereo audio applications.