Design of Low Complexity Accumulator Using Finfet for Various Technologies

Abstract

Abstract FINFET terminological in exactitude process reuses a massive part of well accustomed conventional CMOS process. FINFET is a likely-look alternative to conventional MOSFET which has reached its limit and has too much leakage for too little performance gain. FINFET is being suggested as basics for future IC processes because its power or performance benefits, scalability, superior controls over short channel effort etc., In this paper we propose a outlook for scheming accumulator using FINFET for purpose of minimize number of transistor differentiate to CMOS logic. In circuit level, widely used D flip-flop and at constructional level the full adder cells of FINFET (dual gate transistor) 10T can be used. FINFET is the most propitious double gate transistor, forecast as one of the candidate to restore the epic MOSFET. FINFET technology power consumption is compare with CMOS technology to analyze how the area, delay and power can be reduced.